Friday, October 27, 2006

Shell command inside Makefile

In this post lets learn how to embed a shell script inside a Makefile.

Wot Makefile does:
The Makefile lists the modules that are part of the project and the libraries that should be linked.It is used by the Make utility of the compiler. Learning about make will give you the freedom of modifying it for compile time optimisation and also during testing we can modify Makefile to compile only the necessary files.

Why script inside Makefile:
The Makefile uses lots of Macros and environmental variables. And it does not have the intelligence to differentiate the shell command and normal text. In order to do manipulations on the variables defined inside the Make , we need to use small shell commands.

Shell command in Make:
when a variable is used within $() then the value of the variable is substituted.
To run a shell command command we need to tell make the path where the sh is present.
which sh

use "shell" in the beginning of the command to tell the make that the string following the shell is a
shell command.
VARIABLE = $(shell command)
variable = $(shell echo $(VERSION))

There is no need to use back-quote for the commands given after shell keyword.

Look this space for more info on how to write, optimise and play with Makefile and tips on scripting as well. :-)

Suggestions are welcome


Anonymous said...


Mario Munda said...

This is not working on FreeBSD

Anonymous said...

this saved me

Anonymous said...

Thanks friend, worked like a charm!!!